Von Neumann & Harvard Architecture (OCR A Level Computer Science)

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Jamie Wood

Expertise

Maths

Von Neumann & Harvard Architecture

What is Computer Architecture?

  • A computer architecture describes how it uses the components and instructions to make the computer function

  • There are 2 common types of computer architecture:

    • Von Neumann architecture

    • Harvard architecture

Architecture

Memory Organisation

Bus

Address Space

Control Units

Usage

Von Neumann

Unified Memory

Single

Shared

Single Control Unit

Most modern computers, microcontrollers

Harvard

Separated Memory

Separate

Distinct

Separate Control Units

Specialized embedded systems

Von Neumann Architecture

layout of von neumann architecture

Layout of Von Neumann Architecture

Von Neumann's architecture includes:

  • Control Unit (CU)

    • The control unit controls the operation of the processor and its components

    • It retrieves instructions stored in memory, decodes or interprets them, and then executes them

    • The CU generates timing signals and controls the other units of the computer

  • Arithmetic Logic Unit (ALU)

    • The ALU carries out all the arithmetic and logic operations in the computer such as:

      • Addition

      • Subtraction

      • Multiplication

      • Division

      • Comparisons, etc.

  • Special registers within the CPU

  • single set of buses to connect the CPU to memory and Input/Output

    • These are communication systems that transfer data between the components inside a computer, or between computers

    • There are 3 types of buses:

      • The data bus carries data

      • The address bus carries the addresses where data must be picked up or stored

      • The control bus carries signals relating to the control and coordination of all the activities within the computer

  • Memory (RAM)

    • The memory unit stores both data and instructions for processing

    • These are stored in the same format

    • The memory is divided into cells, each of which can be accessed by their address

    • The memory is a linear or sequential array of bytes

Harvard Architecture

layout of harvard architecture

Layout of Harvard Architecture

Harvard architecture includes:

  • Separate Instruction and Data Memory

    • In Harvard architecture, the system has separate memory units for storing data and instructions

    • This separation provides greater speed and efficiency as the system can fetch data and instructions simultaneously from separate buses, without one interfering with the other

  • Separate Instruction and Data Buses

    • Harvard architecture uses separate buses for data and fetching instructions, meaning that data transfers do not interfere with instruction fetches

    • This can lead to better overall system performance

  • Control Unit (CU)

    • The control unit controls the operation of the processor and its components

    • It retrieves instructions stored in memory, decodes or interprets them, and then executes them

    • The CU generates timing signals and controls the other units of the computer

  • Arithmetic Logic Unit (ALU)

    • The ALU carries out all the arithmetic and logic operations in the computer such as:

      • Addition

      • Subtraction

      • Multiplication

      • Division

      • Comparisons, etc.

How does Harvard Architecture improve performance over Von Neumann Architecture?

There are several things that Harvard architecture has or can do which can improve performance over Von Neumann architecture:


Feature


Explanation

Two separate areas of memory

One for instructions and one for data

Instructions and data can be accessed concurrently

Different sets of buses

One for instructions and one for data

Instructions and data can be accessed concurrently

Pipelining

Whilst an instruction is being executed the next can be decoded and the subsequent one fetched

Use of Cache

A small amount of high performance memory which is next to the CPU

It stores frequently used data and instructions

Virtual cores / Hyper-threading

This is where a physical core can act as two virtual cores

Multiple Cores

Each core acts as a separate processing unit

Onboard Graphics

Built-in circuitry for graphics processing

Performance boosting mode

The clock speed can be temporarily increased for a performance boost

Out of Order Execution

Instructions can be executed before earlier ones if they are ready

Super Scalar

Multiple instructions can be executed simultaneously

Exam Tip

  • You will not be asked about specific aspects of “contemporary processor architecture” apart from those on this page. You may be asked to show an awareness of how contemporary processors differ from a pure Von Neumann architecture in more open questions

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Jamie Wood

Author: Jamie Wood

Jamie graduated in 2014 from the University of Bristol with a degree in Electronic and Communications Engineering. He has worked as a teacher for 8 years, in secondary schools and in further education; teaching GCSE and A Level. He is passionate about helping students fulfil their potential through easy-to-use resources and high-quality questions and solutions.