Pipelining (OCR A Level Computer Science): Revision Note

Exam code: H446

Jamie Wood

Written by: Jamie Wood

Reviewed by: James Woodhouse

Updated on

Pipelining

What is pipelining?

  • In A Level Computer Science, pipelining is the process of carrying out multiple instructions concurrently

  • Each instruction will be at a different stage of the fetch-decode-execute cycle

  • One instruction can be fetched while the previous one is being decoded and the one before is being executed

  • This table shows which stage each instruction is at during each step:

 


Fetch


Decode


Execute

Step 1

Instruction A

 

 

Step 2

Instruction B

Instruction A

 

Step 3

Instruction C

Instruction B

Instruction A

Step 4

Instruction D

Instruction C

Instruction B

  • While one instruction is being executed, the next instruction will be decoded and the following instruction will be fetched

How does pipelining improve processor performance?

  • Pipelining increases instruction throughput by overlapping stages, while latency per instruction remains unchanged

  • The CPU is not idle while waiting for the next instruction which increases the speed of execution

  • The next instruction is fetched while the current one is decoded/executed

  • All parts of the processor can be used at any instant in time

What happens to the pipeline when a branch is taken?

  • Pipelining works best when instructions run in sequence, because the next instructions are fetched before the current one has been executed

  • If a branch instruction is executed and the branch is taken, the instructions already fetched and decoded behind it are the wrong ones

  • These instructions are discarded: the pipeline is flushed

  • The processor then fetches from the new address in the PC, so the pipeline has to refill and some stages sit idle

  • This table shows instruction A as a branch to instruction X:

Fetch

Decode

Execute

Step 1

Instruction A

Step 2

Instruction B

Instruction A

Step 3

Instruction C

Instruction B

Instruction A (branch to X)

Step 4

Instruction X

Step 5

Instruction Y

Instruction X

Step 6

Instruction Z

Instruction Y

Instruction X

  • Instructions B and C are flushed, so no instruction is executed in steps 4 and 5

  • Programs with many branches therefore gain less from pipelining than programs that run mostly in sequence

Examiner Tips and Tricks

  • In an extended "discuss pipelining" question, the top band needs evaluation as well as description. Explain that branches flush the pipeline, so the benefit depends on how much of the program runs in sequence.

  • Do not confuse pipelining with multiple cores. Pipelining overlaps the stages of the FDE cycle inside one processor.

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Jamie Wood

Author: Jamie Wood

Expertise: Curriculum Expert

Jamie graduated in 2014 from the University of Bristol with a degree in Electronic and Communications Engineering. He has worked as a teacher for 8 years, in secondary schools and in further education; teaching GCSE and A Level. He is passionate about helping students fulfil their potential through easy-to-use resources and high-quality questions and solutions.

James Woodhouse

Reviewer: James Woodhouse

Expertise: Portfolio Lead

James graduated from the University of Sunderland with a degree in ICT and Computing education. He has over 14 years of experience both teaching and leading in Computer Science, specialising in teaching GCSE and A-level. James has held various leadership roles, including Head of Computer Science and coordinator positions for Key Stage 3 and Key Stage 4. James has a keen interest in networking security and technologies aimed at preventing security breaches.