The following table shows part of the instruction set for a processor. The processor has two registers, the Accumulator (ACC) and the Index Register (IX).
Instruction | Explanation | |
|---|---|---|
Opcode | Operand | |
|
| Immediate addressing. Load the number n to ACC |
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| Direct addressing. Load the contents of the location at the given address to ACC |
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| Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC |
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| Indexed addressing. Form the address from <address> + the contents of the index register. Copy the contents of this calculated address to ACC |
|
| Immediate addressing. Load the number n to IX |
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| Add the number n to the ACC |
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| Add the contents of the given address to the ACC |
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| Subtract the number n from the ACC |
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| Subtract the contents of the given address from the ACC |
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| Add 1 to the contents of the register (ACC or IX) |
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| Subtract 1 from the contents of the register (ACC or IX) |
<address> can be an absolute or a symbolic address | ||
The current contents of memory are shown:
Address | Data |
|---|---|
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The current contents of the ACC and IX are shown:
ACC | 50 |
|---|---|
IX | 20 |
Complete the table by writing the content of the ACC and the IX after each set of instructions has run.
Instructions | ACC content | IX content | |
|---|---|---|---|
1 |
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2 |
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3 |
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4 |
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