Central Processing Unit (CPU) Architecture (Cambridge (CIE) A Level Computer Science): Exam Questions

Exam code: 9618

46 mins7 questions
1a2 marks

A computer system has a dual-core Central Processing Unit (CPU).

State the purpose of the system clock and the Control Unit (CU) in a CPU.

1b5 marks

(i) The number of cores in the processor affects the performance of the computer system.

Identify one other feature of a processor that can affect the performance of a computer system and state why it affects the performance.

(2)

(ii) A solid state (flash) memory drive is automatically recognised by the computer when it is plugged into a port in the computer.

Identify an appropriate type of port to connect the solid state memory drive to the computer.

Explain how this port provides an automatic connection.

(3)

2a2 marks

A computer designed using the Von Neumann model for a computer system contains general purpose registers and special purpose registers.

Describe the purpose of the Status Register (SR).

2b2 marks

Identify two differences between general purpose registers and special purpose registers.

3a4 marks

A student has a computer.

The computer is designed using the Von Neumann model for a computer system.

Complete the table by describing the purpose of each of the given registers.

Register

Purpose

Program Counter (PC)

Memory Address Register (MAR)

Memory Data Register (MDR)

Index Register (IX)

3b4 marks

The student needs to connect the computer to a monitor that has a screen resolution of 2560 × 1600 pixels. The monitor also has built-in speakers.

The computer has a Video Graphics Array (VGA) port and a High Definition Multimedia Interface (HDMI) port.

Explain the benefits of connecting the monitor to the computer using the HDMI port instead of the VGA port.

4a4 marks

The Central Processing Unit (CPU) of the basic Von Neumann model for a computer system contains several special purpose registers.

The Memory Data Register (MDR), Index Register (IX) and the Accumulator (ACC) are examples of special purpose registers.

Identify two other special purpose registers and state their role in the CPU.

4b6 marks

A computer has a single 2.1GHz CPU.

(i) Describe how increasing the clock speed to 4GHz can increase the performance of the computer.

(1)

(ii) A second computer has a CPU with two 2.1GHz cores.

Explain why the second computer does not always run twice as fast as the computer with one 2.1GHz CPU.

(5)

51 mark

An optical disc reader/writer is connected to the computer.

Give the name of one port that can provide a connection for the optical disc reader/writer.

63 marks

Identify one port that could be used to connect the virtual reality headset to the laptop.

Justify your choice.

7a5 marks

A computer system is designed using the basic Von Neumann model.

Registers and buses are components in the Von Neumann model.

(i) Identify three other components in the Von Neumann model of a computer system.

Do not include registers or buses in your answers.

(3)

(ii) Identify two differences between special purpose registers and general purpose registers.

(2)

7b4 marks

The following incomplete table contains steps of the Fetch‑Execute (F‑E) cycle and their descriptions.

Complete the table by writing the missing steps using register transfer notation and the missing descriptions.

Step

Description

The address in PC is incremented.

MDR ← [[MAR]]

MAR ← [PC]

The contents of MDR are copied into CIR.

7c1 mark

Interrupts can be caused by software programs or hardware devices.

State one cause of a software interrupt.

7d3 marks

The following statements describe the stages that the CPU performs when an interrupt is detected.

There are three missing statements.

Write the letter of the missing statements from the table in the correct place to complete the description.

  1. At the end of each Fetch-Execute (F-E) cycle, the processor checks if an interrupt flag is set.

  2. ...............................

  3. If the interrupt priority is high enough, the processor saves the current contents of the registers.

  4. .................................

  5. When servicing of the interrupt is complete, the processor restores the registers.

  6. ...................................

Letter

Stage

A

The address of the Interrupt Service (ISR) handling routine is loaded into the Program Counter (PC).

B

Lower priority interrupts are re-enabled.

C

The device causing the interrupt transfers data to the CPU.

D

The processor identifies the source of the interrupt and checks the priority of the interrupt.

E

The ISR is incremented.